We are developing optical interconnect technology for high-speed and low-power-consumption photonic-electronic convergence devices. We particularly focus on design and implementation techniques for electrical circuits that generate transmission signals.

・High-speed and low-power-consumption driver circuit technology

・T. Kishi et al., "42-Gbps/ch x 4 ch Simultaneous Error-Free Operation With Low-Power Transmitter Flip-Chip-Bonded 1.3-μm LD-Array-on-Si", Proc. Opti. Fiber Commun. Conf. Exhib., 2025, Paper M2G.2.
・T. Kishi et al., "4 ch × 30-Gbps/ch Optical Transmission Performance of a Low-Power Transmitter Flip-Chip-Bonded 1.3-μm LD Array-on-Si", J. Lightw. Technol., vol. 42, no. 19, pp. 6691-6700, Jun. 2024.
・T. Kishi et al., "A 25-Gbps x 4 ch, Low-power Compact Wire-bond-free 3D-stacked Transmitter
Module with 1.3-μm LD-array-on-Si for On board Optics", Proc. Opti. Fiber Commun. Conf. Exhib., 2019, Paper Tu2I.1.

・Technology

NTT's original analog circuit technology is what drives the optical signals transmitted from the membrane optical device. With electrical CMOS devices, we are developing high-speed and low-power-consumption analog circuit technology.

Optical transmitter architecture

・Features

Since we can perform optical simulation in an electrical design environment that comprises optical device models, it is possible to simulate optical devices and electrical circuits in a design environment. In this environment, we can develop the analog circuit technology that improves bandwidth while considering optical magnitude and phase.

Simulated normalized EO response and group delay characteristics

・Application

This development enables optical transmitters to operate at high speed and with low power consumption. We will be demonstrating the effectiveness of the analog circuit technology using the measurement results of devices implemented with optical devices and electrical circuits.